module op_exp0(a,b,c,d,e,f,q);
input a,b,c,d,e,f;
output q;
wire sum1,sum2,sum3,sum4;
assign sum1 = a + (b + c);
assign sum2 = a + (b + d);
assign sum3 = a + (b + e);
assign sum4 = a + (b + f);
assign q = sum1 & sum2 & (sum3 | sum4);
endmodule